💾 Addressable Memory

Written and maintained by the PhDino author · Last reviewed 21 September 2026 · Checked against 2 independent reference calculations · how PhDino checks its numbers

How the width of an address bus directly determines how much memory a processor can address.

An address bus is the set of wires a processor uses to specify which memory location it wants to read or write — and since each wire carries one bit, an n-bit address bus can express exactly 2ⁿ distinct addresses. This single relationship is why address bus width is one of the most fundamental architectural limits in computing: it directly caps the maximum memory a system can ever address, regardless of how much physical memory might otherwise be installed.

This exact relationship is why 32-bit systems famously topped out around 4 GB of addressable memory (2³² ≈ 4.29 billion addresses) — a limit baked directly into the address bus width, not into any particular chip or operating system, and precisely why the shift to 64-bit addressing was necessary to meaningfully exceed it.

Key formula

Addressable locations = 2^(address bus width in bits)

How to use the Addressable Memory calculator

Use this to see how much memory a processor can address from the width of its address bus: with n address bits there are 2ⁿ distinct addresses. Enter the number of address lines and the calculator gives the number of locations and, for a byte-addressable machine, the number of bytes.

It answers questions such as why a 32-bit system tops out at 4 GiB, how much memory an older 24-bit processor could reach, and how many address lines a memory chip of a given size needs. Each extra address bit doubles the reachable memory.

Address Bus Width

The number of address lines, the width of the address bus in bits. It is not the same as the data bus width, which sets how many bits move at a time.

Worked example: a 24-bit address bus

An older processor has a 24-bit address bus and addresses memory one byte at a time. How much memory can it reach?

Worked by hand:

1. Number of addresses. 2^24 = 16,777,216 distinct addresses.
2. Bytes. With one byte at each address, that is 16,777,216 bytes.
3. In binary units. 16,777,216 ÷ 1,024 = 16,384 KiB, and ÷ 1,048,576 = 16 MiB.

A 24-bit address bus reaches 16 MiB. Adding just one more address line would double that to 32 MiB, which is the pattern behind every size step: 16 bits reach 64 KiB, 20 bits 1 MiB, 32 bits 4 GiB, and 40 bits 1 TiB. The calculator's range stops at 40 bits, but the rule is the same at any width.

Reading the result: address space is not the same as memory

The address bus width sets the ceiling on the address space, not the amount of memory that is fitted, and not always the amount that is usable. A system can have less RAM than it can address, and part of the space it can address is used for things other than RAM.

• Binary prefixes are powers of 1,024: 1 KiB is 1,024 bytes and 1 MiB is 1,048,576 bytes. Decimal kilobytes and megabytes (1,000 and 1,000,000) are used by drive makers, which is why the two can disagree by several percent.
• Memory-mapped input and output takes part of the address space, so a 32-bit system with 4 GiB of address space can show noticeably less than 4 GiB of usable RAM.
• A word-addressable machine multiplies the count of locations by the word size in bytes, so the same number of address bits can reach more bytes. This calculator reports byte-addressable memory.
• Modern 64-bit processors do not use all 64 bits for physical addresses; typical hardware uses around 40 to 52 bits, and virtual memory maps a larger virtual space onto the physical one.

Notes & limitations

• This assumes byte-addressable memory (each address refers to one byte), the near-universal convention in modern general-purpose computing — some specialized architectures address memory in larger words instead, which changes the byte-to-address relationship.
• Memory capacities here use the binary convention (1 KB = 1024 bytes, 1 MB = 1024² bytes) standard in addressing and memory contexts, as opposed to the decimal convention (1 KB = 1000 bytes) often used for storage device marketing — the two conventions genuinely disagree by a few percent, which is exactly why a drive's advertised capacity and its capacity as reported by an operating system don't quite match.

Common mistakes

• Confusing the address bus width with the data bus width. The first sets how many locations exist, the second how many bits are transferred per access.
• Mixing KB and KiB, or MB and MiB. Use powers of 1,024 for memory sizes and be explicit about the prefix.
• Forgetting that every extra address bit doubles the space, so ten extra bits multiply it by 1,024.
• Expecting a 64-bit system to address 2⁶⁴ bytes of RAM. Hardware and operating systems limit the physical address width far below that.
• Ignoring reserved regions, which is why the usable memory on a 32-bit system can fall short of 4 GiB.

Frequently asked questions

Papers worth reading

Virtual memory Denning, P. J. (1970), ACM Computing Surveys. A clear survey of how the addresses a program uses are mapped onto the memory a machine really has, the idea behind address spaces.